Electrical serial communication standards, such as SATA, PCI-Express, FBDIM, HT3, and the like, are using Spread Spectrum Clocking (SSC) to minimize the effects of electromagnetic interference between communication channels. Standards have a specified clock modulation frequency typically in the range of 30 KHz to 33 KHz, and a modulation magnitude range of 0 PPM to −5000 PPM. When analyzing jitter on a serial data pattern, the effects of SSC appear as uncorrelated periodic jitter. As a consequence, Bit Error Rate (BER) estimations made on the basis of jitter breakdown in its components will be skewed by the effects of clock modulation.
A sequential sampling oscilloscope is a primary tool for analyzing and characterizing electrical serial links. Currently, there is no sampling oscilloscope based solution in the market that deals with jitter analysis and BER estimation in the presence of SCC.